Datasheet

Integrated I/O (IIO) Configuration Registers
274 Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.2.101 RPEDMASK
Root Port Error Detect Status Mask
This register masks the associated error messages (received from PCIe* link and NOT
the virtual ones generated internally), from causing the associated status bits in AER to
be set.
14.2.102 XPUNCEDMASK
XP Uncorrectable Error Detect Mask
This register masks other uncorrectable errors from causing the associated
XPUNCERRSTS status bit to be set
Type: CFG PortID: N/A
Bus: 0 Device: 0Function:0
Bus: 0 Device: 2Function:0-3
Bus: 0 Device: 3Function:0-3
Offset: 0x220
Bit Attr Default Description
31:3 RV - Reserved.
2:2 RWS 0x0 fatal_error_detected_status_mask:
1:1 RWS 0x0 non_fatal_error_detected_status_mask:
0:0 RWS 0x0 correctable_error_detected_status_mask:
Type: CFG PortID: N/A
Bus: 0 Device: 0Function:0
Bus: 0 Device: 2Function:0-3
Bus: 0 Device: 3Function:0-3
Offset: 0x224
Bit Attr Default Description
31:10 RV - Reserved.
9:9 RWS 0x0 outbound_poisoned_data_detect_mask:
8:8 RWS 0x0 received_msi_writes_greater_than_a_dword_data_detect_mask:
7:7 RV -
Reserved3:
Reserved.
6:6 RWS 0x0 received_pcie_completion_with_ur_detect_mask:
5:5 RWS 0x0 received_pcie_completion_with_ca_detect_mask:
4:4 RWS 0x0 sent_completion_with_unsupported_request_detect_mask:
3:3 RWS 0x0 sent_completion_with_completer_abort_detect_mask:
2:2 RV -
Reserved2:
Reserved.
1:1 RWS 0x0 outbound_switch_fifo_data_parity_error_detect_mask:
0:0 RV -
Reserved1:
Reserved.