Datasheet

Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family 283
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
6:4 RO 0x7
uprxpreset:
Upstream Component Receiver Preset Hint
Receiver Preset Hint for Upstream Component. The upstream component
uses this hint for receiver equalization. The Root Ports are upstream
components. The encodings are defined below.
000b: -6 dB
001b: -7 dB
010b: -8 dB
011b: -9 dB
100b: -10 dB
101b: -11 dB
110b: -12 dB
111b: reserved
3:0 RW_O 0x8
uptxpreset:
Upstream Component Transmitter Preset
Transmitter Preset for an Upstream Component. The Root Ports are
upstream components. The encodings are defined below.
0000b: -6.0 dB for deemphasis, 0 dB for preshoot
0001b: -3.5 dB for deemphasis, 0 dB for preshoot
0010b: -4.5 dB for deemphasis, 0 dB for preshoot
0011b: -2.5 dB for deemphasis, 0 dB for preshoot
0100b: 0 dB for deemphasis, 0 dB for preshoot
0101b: 0 dB for deemphasis, 2.0 dB for preshoot
0110b: 0 dB for deemphasis, 2.5 dB for preshoot
0111b: -6.0 dB for deemphasis, 3.5 dB for preshoot
1000b: -3.5 dB for deemphasis, 3.5 dB for preshoot
1001b: 0 dB for deemphasis, 3.5 dB for preshoot
others: reserved
Notes:
1) P0, P1, P4, P7, P8 and P9 are used for normal situation.
2) P2, P3, P5 and P6 are used only for validation purpose, such as to run
PCIe* Tx CEM test.
Type: CFG PortID: N/A
Bus: 0 Device: 2Function:0
Bus: 0 Device: 3Function:0
Offset: 0x26c, 0x26e, 0x270, 0x272, 0x274, 0x276, 0x278, 0x27a
Bit Attr Default Description