Datasheet

Integrated I/O (IIO) Configuration Registers
332 Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.4.38 CHANERRSEV_INT
Internal DMA Channel Error Severity Registers.
14:14 RV - Reserved.
13:0 RWS 0x0
mask13_0:
This register is a bit for bit mask for the CHANERR_INT register
0: enable
1: disable
Type: CFG PortID: N/A
Bus: 0 Device: 4Function:0-7
Offset: 0x184
Bit Attr Default Description
Type: CFG PortID: N/A
Bus: 0 Device: 4Function:0-7
Offset: 0x188
Bit Attr Default Description
31:19 RV - Reserved.
18:18
RWS (Function 0-1)
RO (Function 2-7)
0x0
severity18:
1: Corresponding error logged in the CHANERR_INT register is
escalated as fatal error to the IIO internal core error logic.
0: That error is escalated as non-fatal to the IIO internal core
error logic.
Notes:
This bit is reserved for functions 2-7.
17:17
RWS (Function 0-1)
RO (Function 2-7)
0x0
severity17:
1: Corresponding error logged in the CHANERR_INT register is
escalated as fatal error to the IIO internal core error logic.
0: That error is escalated as non-fatal to the IIO internal core
error logic.
Notes:
This bit is reserved for functions 2-7.
16:16 RWS 0x0
severity16:
1: Corresponding error logged in the CHANERR_INT register is
escalated as fatal error to the IIO internal core error logic.
0: That error is escalated as non-fatal to the IIO internal core
error logic.
15:15 RO 0x0 chanerrsevro1_0:
14:14 RV - Reserved.
13:0 RWS 0x0
severity13_0:
1: Corresponding error logged in the CHANERR_INT register is
escalated as fatal error to the IIO internal core error logic.
0: That error is escalated as non-fatal to the IIO internal core
error logic.