Datasheet

Integrated I/O (IIO) Configuration Registers
352 Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.5.32 DCA_REQID[0:1]
Global DCA Requester ID Table Registers.
14.5.33 MSGADDR
MSI-X Lower Address Registers.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 4Function:0-7
Offset: 0x180 , 0x184
Bit Attr Default Description
31:31 RO 0x0
last:
This bit is set only in the last RequesterID register for this port. Thus, it
identifies that this is the last DCA RequesterID register for this port.
30:30 RV - Reserved.
29:29 RW 0x0
valid:
when set the requester id programmed into bits 15:0 is used by hardware for
DCA write identification, otherwise the bits are ignored.
28:28 RW 0x0
ignore_function_number:
When set, the function number field in the RequesterID is ignored when
authenticating a DCA write, otherwise the function number is included
27:16 RV - Reserved.
15:8 RW 0x0
bus_number:
PCI bus number of the DCA requester
7:3 RW 0x0
device_number:
Device number of the day requester
2:0 RW 0x0
function_number:
Function number of the day requester
Type: MEM PortID: 8’h7e
Bus: 0 Device: 4Function:0-7
Offset: 0x2000
Bit Attr Default Description
31:2 RW_V 0x0
chmsgaddr:
Specifies the local APIC to which this MSI-X interrupt needs to be sent
1:0 RO 0x0 chmsgaddr_const: