Datasheet

Integrated I/O (IIO) Configuration Registers
392 Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.6.54 IRP[0:1]DBGRING0
14.6.55 IRP[0:1]DBGRING1
14.6.56 IRPSPAREREGS
14.6.57 IRP[0:1]RNG
Type: CFG PortID: N/A
Bus: 0 Device: 5Function:0
Offset: 0x818, 0x820
Bit Attr Default Description
63:0 RO 0x0 dbg_ring_sig:
Type: CFG PortID: N/A
Bus: 0 Device: 5Function:0
Offset: 0x828, 0x829
Bit Attr Default Description
7:0 RO 0x0 dbg_ring_sig:
Type: CFG PortID: N/A
Bus: 0 Device: 5Function:0
Offset: 0x82a
Bit Attr Default Description
7:0 RW_L 0xf0
spare_csr:
For ECOs
Type: CFG PortID: N/A
Bus: 0 Device: 5Function:0
Offset: 0x830, 0x834
Bit Attr Default Description
31:31 RWS_L 0x0
select_trig:
Selects the cluster trigger output signals (ClusterTrigOut[1:0]) from this
cluster and places them onto the two LSBs of the lane selected by primary
lane bits[30:27].
30:27 RWS_L 0x0
pri_trig_ln_sel:
Selects the lane this cluster will use to place the designated trigger enabled
by bit 31. When cluster trigger out is enabled by bit 31 then the lane
selected with bits [30:27] will display the CTO triggers on its two LSB bits.
Only if this cluster support CTO outputs.