Datasheet

Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family 423
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.8.2 DID
14.8.3 PCICMD
Type: CFG PortID: N/A
Bus: 0 Device: 5Function:2
Offset: 0x2
Bit Attr Default Description
15:0 RO 0xe2a
device_identification_number:
Device ID values vary from function to function. Bits 15:8 are equal to 0x0E.
Type: CFG PortID: N/A
Bus: 0 Device: 5Function:2
Offset: 0x4
Bit Attr Default Description
15:11 RV - Reserved.
10:10 RO 0x0
intx_disable:
N/A for these devices
9:9 RO 0x0
fast_back_to_back_enable:
Not applicable to PCI Express and is hardwired to 0
8:8 RO 0x0
serr_enable:
This bit has no impact on error reporting from these devices
7:7 RO 0x0
idsel_stepping_wait_cycle_control:
Not applicable to internal devices. Hardwired to 0.
6:6 RO 0x0
parity_error_response:
This bit has no impact on error reporting from these devices
5:5 RO 0x0
vga_palette_snoop_enable:
Not applicable to internal devices. Hardwired to 0.
4:4 RO 0x0
memory_write_and_invalidate_enable:
Not applicable to internal devices. Hardwired to 0.
3:3 RO 0x0
special_cycle_enable:
Not applicable. Hardwired to 0.
2:2 RO 0x0
bus_master_enable:
Hardwired to 0 since these devices don’t generate any transactions
1:1 RO 0x0
memory_space_enable:
Hardwired to 0 since these devices don’t decode any memory BARs
0:0 RO 0x0
io_space_enable:
Hardwired to 0 since these devices don’t decode any I/O BARs