Datasheet

Integrated I/O (IIO) Configuration Registers
466 Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.8.47 IRPP[0:1]NFERRHD[0:3]
IRP Protocol Non-Fatal FERR Header Log.
14.8.48 IRPP[0:1]ERRCNTSEL
IRP Protocol Error Counter Select.
14.8.49 IRPP[0:1]ERRCNT
IRP Protocol Error Count.
Type: CFG PortID: N/A
Bus: 0 Device: 5 Function: 2
Offset: IRPP0NFERRHD: 0x258, 0x25c, 0x260, 0x264
IRPP1NFERRHD: 0x2d8, 0x2dc, 0x2e0, 0x2e4
Bit Attr Default Description
31:0 ROS_V 0x0
hdr:
Logs the first DWORD of the header on an error condition
Type: CFG PortID: N/A
Bus: 0 Device: 5 Function: 2
Offset: 0x268, 0x2e8
Bit Attr Default Description
31:19 RV -
Reserved1:
Reserved
18:0 RW 0x0
irp_error_count_select:
See IRPP0ERRST for per bit description of each error. Each bit in this field has
the following behavior:
0: Do not select this error type for error counting
1: Select this error type for error counting
Type: CFG PortID: N/A
Bus: 0 Device: 5 Function: 2
Offset: 0x26c, 0x2ec
Bit Attr Default Description
31:8 RV -
Reserved1:
Reserved
7:7 RW1CS 0x0
errovf:
Error Accumulator Overflow
0: No overflow occurred
1: Error overflow. The error count may not be valid.
6:0 RW1CS 0x0
errcnt:
This counter accumulates errors that occur when the associated error type is
selected in the ERRCNTSEL register.
Notes:
This register is cleared by writing 7Fh.
Maximum counter available is 127d (7Fh)