Datasheet

Datasheet, Volume 2 259
Processor Configuration Registers
2.19.4 MEM_TRML_TEMPERATURE_REPORT—Memory Thermal
Temperature Report Register
This register is used to report the estimated thermal status of the memory. The
Channel VTS estimated maximum temperature field is used to report the estimated
maximum temperature of all ranks.
2.19.5 MEM_TRML_INTERRUPT—Memory Thermal Interrupt
Register
Hardware uses the information in this register to determine whether a memory thermal
interrupt is to be generated or not.
B/D/F/Type: 0/0/0/MCHBAR PCU
Address Offset: 58A4–58A7h
Reset Value: 0000_0000h
Access: RO-V
Size: 32 bits
BIOS Optimal Default 00h
Bit Attr
Reset
Value
RST/
PWR
Description
31:24 RO 0h Reserved
23:16 RO-V 00h Reserved
15:8 RO-V 00h Uncore
Channel 1 VTS Estimated Max Temperature
(CHANNEL1_ESTIMATED_MAX_TEMPERATURE)
VTS Estimated Temperature in Degrees C.
7:0 RO-V 00h Uncore
Channel 0 VTS Estimated Max Temperature
(CHANNEL0_ESTIMATED_MAX_TEMPERATURE)
VTS Estimated Temperature in Degrees C.
B/D/F/Type: 0/0/0/MCHBAR PCU
Address Offset: 58A8–58ABh
Reset Value: 0000_0000h
Access: RW
Size: 32 bits
BIOS Optimal Default 0000_0000h
Bit Attr
Reset
Value
RST/
PWR
Description
31:5 RO 0h Reserved
4 RW 0b Uncore
Critical Threshold Interrupt Enable
(CRITICAL_THRESHOLD_INT_ENABLE)
This bit controls the generation of a thermal interrupt when the
Critical Threshold temperature is crossed.
3RO 0h Reserved
2 RW 0b Uncore
Hot Threshold Interrupt Enable
(HOT_THRESHOLD_INT_ENABLE)
This bit controls the generation of a thermal interrupt when the Hot
Threshold temperature is crossed.
1RO 0h Reserved
0 RW 0b Uncore
Warm Threshold Interrupt Enable
(WARM_THRESHOLD_INT_ENABLE)
This bit controls the generation of a thermal interrupt when the
Warm Threshold temperature is crossed.