LXD970A Demo Board for 10/100 and 100BASE-FX Applications Development Kit Manual January 2001 As of January 15, 2001, this document replaces the Level One document LXD970A Demo Board for 10/100 and 100BASE-FX Applications.
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Contents 1.0 General Description .................................................................................................. 5 1.1 2.0 Features ................................................................................................................ 5 Equipment and Setup ............................................................................................... 7 2.1 2.2 2.3 2.4 Test Setup ................................................................................................
Demo Board for 10/100 and 100BASE-FX Applications — LXD970A 1.0 General Description The LXD970A Demo Board is a versatile 10/100Mbps Ethernet media access unit (MAU) that demonstrates all of the integral features of the LXT970A Fast Ethernet Transceiver. The LXD970A provides a working platform for evaluation of the LXT970A Fast Ethernet Transceiver in 10BASE-T and/or 100BASE-TX/FX applications. The LXD970A Demo Board is configured with a single chip 10/100Mbps, IEEE 802.
LXD970A — Demo Board for 10/100 and 100BASE-FX Applications Figure 1.
Demo Board for 10/100 and 100BASE-FX Applications — LXD970A 2.0 Equipment and Setup The LXD970A Demo Board includes all the components needed for a successful evaluation. However, the following additional equipment is recommended: • NetCom System X-1000 transceiver test box configured with firmware version 1.17 or newer. • PC with Fast Ether Windows (version 1.5 or newer) installed. • Various lengths of Category 5 Unshielded Twisted-Pair (UTP) cable (1, 20, 40, 60, 80, 100, 120 and 140 meters).
LXD970A — Demo Board for 10/100 and 100BASE-FX Applications 2.2 Loading Test File A disk that contains the file needed for testing is included with the LXD970A demo board. This file contains “Killer Packets” (100Tx4.s), that exhibit worst case baseline wander characteristics suitable for evaluating link performance and comparing the LXT970A to alternative products. Some devices do not adjust well over a range of cable distances.
Demo Board for 10/100 and 100BASE-FX Applications — LXD970A 2.3 Power Supply Option The LXD970A includes a jumper (JP8), which provides a an optional power supply source for the VCC pins; VCCA (analog supply), VCCR (receive supply), VCCT (transmit supply) and VCCD (digital supply). In the original factory configuration, this jumper is shorted by a circuit trace and all LXD970A power is supplied via the MII pin (J1). However, the circuit trace can be easily cut to provide the JP8 isolation option. 2.3.
LXD970A — Demo Board for 10/100 and 100BASE-FX Applications 3.0 Jumpers There are 7 Jumpers on the LXD970 Demo Board. Table 2 describes these jumpers and their functions. Table 2. Jumper Descriptions Ref Des Function JP1 Hardware Control Interface: Provides access to voltage sensitive manual control functions. See Tables 3, 4 and 5 for details. JP3 MDIO: Connects the MDIO pin to the MII connector. With the trace cut and the jumper open, the MDIO pin can be connected to an external device.
Demo Board for 10/100 and 100BASE-FX Applications — LXD970A 4.0 Hardware Control Interface 4.1 Multi-Function Pins The Hardware Control Interface (JP1) provides access to the Multi-Function (MF) pins which decode 4-level supply voltages to establish two independent settings per pin. The first setting determines chip address. The second setting determines configuration of the LXD970A. The 4level inputs referred to as VMF1, VMF2, VMF3 and VMF4 are shown in Table 3. Table 3.
LXD970A — Demo Board for 10/100 and 100BASE-FX Applications 4.1.1 Function/Address Settings The multi-function pins allow the user to enable or disable the applicable functions and determine chip address according to the input level selected. Table 4 shows the status of the function according to the (VMF) selection. Table 4.
Demo Board for 10/100 and 100BASE-FX Applications — LXD970A 4.1.2 Additional Jumper Functions In addition to the MF pins, the Hardware Control Interface (JP1) contains 10 pins, (#41 - #50) that are labeled as MAN0, MAN1, MAN2, TRSTE and MDDIS, (Note: TRSTE and MDDIS are not labeled on the demo board). MAN0 = CFG0, MAN1 = FDE and MAN2 = CFG1. The Manual pins control the status of the applicable function by installing or removing a jumper. See Table 6 for function status. Table 6.
LXD970A — Demo Board for 10/100 and 100BASE-FX Applications Figure 5.
