Datasheet

ACPI Devices
Intel
®
Atom™ Processor E6xx Series Datasheet
203
11.1.5.2 Counter Latch Command
This latches the current count value and is used to ensure the count read from the
counter is accurate. The count value is then read from each counter’s count register
through the Counter Ports Access Ports Register (40h for counter 0, 41h for counter 1,
and 42h for counter 2). The count must be read according to the programmed format,
i.e., if the counter is programmed for two byte counts, two bytes must be read. The two
bytes do not have to be read one right after the other (read, write, or programming
operations for other counters may be inserted between the reads). If a counter is
latched once and then latched again before the count is read, the second Counter Latch
Command is ignored.
11.1.5.3 Offset 40h, 41h, 42h: Interval Timer Status Byte Format Register
Each counter’s status byte can be read following a Read Back Command. If latch status
is chosen (bit 4=0, Read Back Command) as a read back option for a given counter, the
next read from the counter’s Counter Access Ports Register (40h for counter 0, 41h for
counter 1, and 42h for counter 2) returns the status byte. The status byte returns the
following:
Table 299. 43h: RBC – Read Back Command
Size: 8 bit Default: XXXXXXX0b Power Well: Core
Fixed IO Address: 43h
Bit Range Default Access Acronym Description
07 :06 00 RW RBC Read Back Command: Must be “11” to select the Read Back Command
05 0 RW LC
Latch Count: When cleared, the current count value of the selected
counters will be latched
04 0 RW LS
Latch Status: When cleared, the status of the selected counters will be
latched
03 0 RW C2S
Counter 2 Select: When set to 1, Counter 2 count and/or status will be
latched
02 0 RW C1S
Counter 1 Select: When set to 1, Counter 1 count and/or status will be
latched
01 0 RW C0S
Counter 0 Select: When set to 1, Counter 0 count and/or status will be
latched.
00 0 RO RSVD Reserved
Table 300. 43h: CLC – Counter Latch Command
Size: 8 bit Default: X0h Power Well: Core
Fixed IO Address: 43h
Bit Range Default Access Acronym Description
07 :06 00 RW CL
Counter Selection: Selects the counter for latching. If “11” is written,
then the write is interpreted as a read back command.
00 = Counter 0
01 = Counter 1
10 = Counter 2
05 :04 0 RW
Counter Latch Command: Write “00” to select the Counter Latch
Command.
03 :00 0 RO RSVD Reserved. Must be 0.