Datasheet
ACPI Devices
Intel
®
 Atom™ Processor E6xx Series Datasheet
210
11.2.2 Theory Of Operation
11.2.2.1 Non-Periodic Mode – All timers
This mode can be thought of as creating a one-shot. When a timer is set up for non-
periodic mode, it generates an interrupt when the value in the main counter matches 
the value in the timer’s comparator register. As timers 1 and 2 are 32-bit, they will 
generate another interrupt when the main counter wraps.
T0CV cannot be programmed reliably by a single 64-bit write in a 32-bit environment 
unless only the periodic rate is being changed. If T0CV needs to be reinitialized, the 
following algorithm is performed: 
1. Set T0C.TVS
2. Set the lower 32 bits of T0CV
3. Set T0C.TVS
4. Set the upper 32 bits of T0CV
Every timer is required to support the non-periodic mode of operation.
Table 309. 108h, 128h, 148h: T[0-2]CV – Timer [0-2] Comparator Value
Size: 64 bit Default: Power Well: Core
Access
PCI Configuration B:D:F
Offset Start:
Offset End:
108h, 128h, 148h
10Fh, 12Fh, 14Fh
Bit Range Default Access Acronym Description
63 :0
See 
Desc
RW
Timer Compare Value — R/W. Reads to this 
register return the current value of the 
comparator
Timers 0, 1, or 2 are configured to non-
periodic mode:
Writes to this register load the value against 
which the main counter should be compared 
for this timer.
When the main counter equals the value last 
written to this register, the corresponding 
interrupt can be generated (if so enabled).
The value in this register does not change 
based on the interrupt being generated.
Timer 0 is configured to periodic mode:
When the main counter equals the value last 
written to this register, the corresponding 
interrupt can be generated (if so enabled).
After the main counter equals the value in this 
register, the value in this register is increased 
by the value last written to the register.
As each periodic interrupt occurs, the value in 
this register will increment. When the 
incremented value is greater than the 
maximum value possible for this register 
(FFFFFFFFh for a 32-bit timer or 
FFFFFFFFFFFFFFFFh for a 64-bit timer), the 
value will wrap around through 0. For 
example, if the current value in a 32-bit timer 
is FFFF0000h and the last value written to this 
register is 20000, then after the next interrupt 
the value will change to 00010000h
Default value for each timer is all 1s for the 
bits that are implemented. For example, a 32-
bit timer has a default value of 
00000000FFFFFFFFh. A 64-bit timer has a 
default value of FFFFFFFFFFFFFFFFh.










