Datasheet

Intel Desktop Board D915PCY/D915PCM Technical Product Specification
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2.6 Interrupts
The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the
Advanced Programmable Interrupt Controller (APIC) portion of the ICH6 component. The PIC is
supported in Windows 98 SE and Windows ME and uses the first 16 interrupts. The APIC is
supported in Windows 2000 and Windows XP and supports a total of 24 interrupts.
Table 15. Interrupts
IRQ System Resource
NMI I/O channel check
0 Reserved, interval timer
1 Reserved, keyboard buffer full
2 Reserved, cascade interrupt from slave PIC
3 COM2
(Note 1)
4 COM1
(Note 1)
5 LPT2 (Plug and Play option)/User available
6 Diskette drive
7 LPT1
(Note 1)
8 Real-time clock
9 User available
10 User available
11 User available
12 Onboard mouse port (if present, else user available)
13 Reserved, math coprocessor
14 Primary IDE/Serial ATA (if present, else user available)
15 Secondary IDE/Serial ATA (if present, else user available)
16
(Note 2)
User available (through PIRQA)
17
(Note 2)
User available (through PIRQB)
18
(Note 2)
User available (through PIRQC)
19
(Note 2)
User available (through PIRQD)
20
(Note 2)
User available (through PIRQE)
21
(Note 2)
User available (through PIRQF)
22
(Note 2)
User available (through PIRQG)
23
(Note 2)
User available (through PIRQH)
Notes:
1. Default, but can be changed to another IRQ.
2. Available in APIC mode only.
2.7 PCI Conventional Interrupt Routing Map
This section describes interrupt sharing and how the interrupt signals are connected between the
PCI Conventional bus connectors and onboard PCI Conventional devices. The PCI Conventional
specification describes how interrupts can be shared between devices attached to the PCI
Conventional bus. In most cases, the small amount of latency added by interrupt sharing does not