WHCK Report

Errata and Contingencies
Operating
System
Failing Test
Expiry Date
ID
Number
Type
Error Description
Windows 8
64-bit
xHCI Debug
Capability
Compliance
(Logo)
12/31/2013 566
Erratum The XHCI Debug Capability Compliance Test will fail XHCI
controllers that do not provide the debug capability registers.
Windows 8
64-bit
xHCI Debug
Capability
Compliance
(Logo)
12/31/2014 844
Erratum The XHCI Debug Capability Compliance Test will fail XHCI
controllers that do not provide the debug capability registers.
Windows 8
64-bit
KS Position
Test(System)
12/31/2013 265
Erratum USB core stack does not respond to the device start stream
command quickly. Because of this, duration and length cannot
accurately be measured
Windows 8
64-bit
KS Position
Test(System)
10/26/2015 647
Erratum The "Streaming with 2 different instance of the pin" and
"Streaming with 2 different instance of the pin with Different
format" Wave test cases and "GetPosition multiple buffers" KS
Position test case fail to properly create a second pin instance.
Windows 8
64-bit
Single Computer
Display Object
Test
8/1/2013 884
Erratum AllInOne desktop computers have the "Computer.AllInOne" form
factor. For this form factor, the test should recognize the mouse
and keyboard to be external to the main computer machine.
Without this filter it expects the mouse/keyboard to be part of the
computer which may not be the case.
Windows 8
64-bit
UAA test
(System)
7/1/2013
244
Contingency Section 3.3.14 of the Intel High Definition Audio specification
mandates a reset value of 0 for the Interrupt Control register on
HD Audio controllers.
Windows 8
64-bit
UAA test
(System)
7/1/2014
354
Contingency The FIFO size for Input and Output Stream Descriptors should be
read only.
Windows 8
64-bit
UAA test
(System)
7/2/2013
372
Contingency Section 3.3.14 of the Intel High Definition Audio specification
mandates a reset value of 0 for the Interrupt Control register on
HD Audio controllers. Some Intel HD Audio controllers have bit 30
(Controller Interrupt Enable) and/or bit 31 (Global Interrupt Enable)
set to 1 after a reset.