PLMP Report

Operating System
Failing Test
Expiry
Date
ID
Number
Type
Error Description
Windows 7
Windows 7 64-bit
PCI Hardware
Compliance Test
For Systems
12/1/2012
1241
Erratum
This happens because the PCI Compliance test assumes that if
the Data Link Layer Link Active Reporting Capable bit in the Link
Capabilities register for a given PCIe port is set then that
indicates that the Data Link Layer Link Active bit will also be set.
This is an incorrect assumption because the Data Link Link
Layer Link Active bit can be reset when there is no device
below the port. This assertion needs to be removed from the
PCIHCT. The current architecture of the PCIHCT prevents it from
knowing whether devices exist below a bridge/port.
Windows 7
Windows 7 64-bit
PCI Hardware
Compliance Test
For Systems
12/1/2012
1650
Erratum
Assertion 2C79B356-6B37-4BEC-8F4E-DD6588082AC2 Bit
range 31:14 (Reserved_3)in the Correctable Error Mask register
(offset 14h) in the Advanced Error Reporting Capability table
must be read-only and always return 0 .
Windows 7
Windows 7 64-bit
PCI Hardware
Compliance Test
For Systems
12/1/2012
923
Erratum
Assertion FAE18121-9177-4FB2-A081-0D04C285EFF2 Bit
range 15:0 (Extended Capability ID)in the Enhanced Capability
Header register (offset 0h) in the Unrecognized Enhanced
Capability ID 13 table is Dh. It must be in the range [0x0 - 0xB]
as all other Capability IDs are reserved.
Windows 7
Windows 7 64-bit
UAA Test - Win7
(System)
6/1/2015
513
Erratum
UAA Test requires the Traffic Priority bit to be read/write -
however there are two specs that apply, and they conflict. One
says the bit must be read/write, the other says it must be read-
only. Contact has been made with the author of both specs
(Intel) but until this point is clarified we cannot fail submissions
containing this test failure.