MLP Report

Errata and Contingencies
Operating System Failing Test
Expiry
Date
ID
Number Type Error Description
Windows 7
Windows 7 64-bit
1)Class Driver
Fidelity Test -
Win7 (System,
Manual)
2)Fidelity Test -
Win7 (System,
Manual)
12/31/2009 1547
Erratum
Fidelity Test now includes a "Render Power Transition" test.
This preview filter covers all errors in this new test of
SYSFUND-0050.
Windows 7
Windows 7 64-bit
Class Driver
Fidelity Test -
Win7 (System,
Manual)
12/01/2009 1670
Erratum
EU restrictions place a cap on the output level of headphone
jacks at 32 Ohm load: headphones are not allowed to have an
electrical output of more than 150 mV at that load.
We test headphone jacks at 300 Ohm load; the relationship
between the output at 32 Ohms and the output at 320 Ohms
depends on the output impedance of the headphone jack.
In particular, if a headphone jack meets the EU requirement of X
<= 150 mV at 32 Ohms, depending on the output impedance, it
could output a huge amount of power at 300 Ohms, or very
slightly over X mV. Since we require X >= 120 mV at 32 Ohms,
absent knowledge of the output impedance we can only require
X >= 120 mV at 300 Ohms.
120 mV is -18.42 dBV. Any headphone output level at 32 Ohms
that is less than -18.42 dBV is a legitimate failure, even if it is
targeted at EU compliance. Any headphone output level greater
than 1 Vrms (0.707 Vrms for mobile systems) is a legitimate
pass, regardless of EU compliance.
This errata covers output level failures for headphone jacks
between -18.42 dBV and 1 Vrms/0 dBV (0.707 Vrms/-6.93 dBV
for mobile systems)) in accordance with note 6 of the WLP
fidelity requirements.
Window 7
1)Class Driver
Round Trip
Test – Win7
(System,
Manual)
2)Round Trip
Test – Win7
(System,
Manual)
11/01/2009 1709
Erratum
Preview Filter: RoundTrip in-air test
This test case is in preview mode for WLK 1.4. It will be
enforced in November 2009.
Windows 7
Windows 7 64-bit
PCI Hardware
Compliance
Test For
Systems
12/31/2009 385
Erratum
The following PCI Compliance test failure is acceptable: Bit 15
(Bridge Configuration Retry Enable) in the Device Control
register (offset 8h) in the PCI Express Capability table must be
read-only and always return 0 as it is reserved for devices other
than PCI Express to PCI/PCI-X Bridges. Assertion 13A41D3E-
2576-41DC-A67C-525DA3637CEA This failure is acceptable
because this is a PCIe 1.1 feature and the WLP requires
compliance with only PCIe 1.0a.