Accelerated Graphics Port Interface Specification

AGP3.0 Interface Specification
Rev. 1.0
116
5.3 AGP Graphics Aperture
In an AGP3.0 system, driver software and an AGP3.0 device can share large amounts of data through
buffers placed in system RAM. A large buffer requires many host processor virtual pages; although host
system software ensures that these pages appear contiguous to host software (virtually contiguous). It
is often difficult for system software to map these virtual pages to contiguous physical pages in system
memory (physically contiguous). Thus, in the absence of any sort of remapping mechanism, these
pages appear non-contiguous to the rest of the system and require scatter/gather hardware in each
device that will access the buffers to deal with the discontinuity.
Like AGP, AGP3.0 provides a solution to this problem in the form of an AGP Graphics aperture. The
AGP aperture is a physically contiguous range of the physical address space where AGP3.0 Master
accesses directed to it are re-mapped (translated) to potentially physically non-contiguous pages.
AGP3.0 Master translation is accomplished through the AGP Graphics Aperture Re-mapping Table
(GART). For the purposes of translation, the AGP aperture range is split into a series of aligned regions,
each such region is termed an AGP aperture page. Each AGP aperture page has a corresponding
translation in the GART.
Memory
Mapped
I/O Space
Physical
RAM
Graphics
Aperture
Remapping
Table
Memory
Top Of
0x0
Physical Address Space
AGP8X
Port
AGP8X Master Access
outside of Aperture
AGP8X Master Access
inside of Aperture
Figure 5-2: AGP Graphics Aperture Model
In general, system software places the AGP aperture above the top of the memory (above the highest
byte of actual physical RAM in the system) in a hole that does not conflict with memory-mapped I/O
registers of system devices.
AGP3.0 supports AGP3.0 aperture sizes of 4MB and larger; each core-logic implementation indicates
which AGP3.0 aperture sizes are supported through the APSIZE register.
Translation (or re-mapping) through the GART is a physical-to-physical translation and is completely
independent of virtual-to-physical translation performed by host processors in the system.