Accelerated Graphics Port Interface Specification

AGP3.0 Interface Specification
Rev. 1.0
32
2.3.2 Removal of Transaction Types
AGP3.0 removes the use of certain AGP2.0 transactions, which are now classified as reserved events.
The core-logic response to these reserved transactions is implementation specific and beyond the
scope of this specification.
2.3.2.1 High Priority Transactions
AGP3.0 does not support the AGP High Priority Read and Write transactions.
Since only Low Priority transactions are supported, the priority classification no longer has any meaning
under AGP3.0. Therefore Low Priority AGP Read or Write transactions will be referred simply as AGP
Read or Write transactions.
2.3.2.2 Transactions of the “Long” Type
AGP does not support the “Long” version of the AGP Read transactions. The “Long” transactions were
used to specify data payload sizes greater than 64 bytes. AGP3.0 transaction size is limited to a
maximum of 64 bytes. These transactions are aligned to 8 byte address boundaries.
When the AGP master needs to read a large amount of data from system memory, it must split this up
into multiple 64 byte transaction requests. For optimum performance, these requests should be
naturally aligned to 64 byte boundaries.
In some cases, the Core-Logic may have been optimized for data transfers that are greater than 64
bytes. For instance, if the core-logic is designed for cache line accesses of 128 bytes, it may perform
best with AGP request sizes that are some multiple of 128 bytes. A new 3-bit field called ARQSZ in the
Core-Logic’s AGPSTAT[15:13] register is used to provide the optimum transfer size information to
software. The AGP Master should be programmed to group consecutively addressed 64 byte requests
to effectively meet the Core-Logic’s optimum transfer size expectations. Note that this is only a
performance optimization and not a functional requirement. Refer to Sections 2.7.5 and 2.7.4 for more
details.
2.3.2.3 Transaction Encoding Tables
The SBA Interface is used to send four types of requests similar to AGP’s:
1. Type 1: address bits 14:3 and the Length Field [LLL]. The Length is in units of 8 bytes.
2. Type 2: 4 bit Request Codes (CCCC) and address bits 23-15.
3. Type 3: address bits 35:24.
4. Type 4: address bits 47:36. (This is optional and used only if the address is >64 GB.)
Types 2 through 4 are considered “sticky”; after they are sent to the Target, they need not be sent again
unless any of the fields within them change. If such change occurs, only the affected Type request has
to be re-sent to the target.
Whenever the core-logic executes a reset (as it would during a normal power-up event) the internally
stored state of the “sticky” request fields, Type 2-4, must be initialized such that the address bits are
cleared to 00h. Also, the internal state of the “sticky” requests in the core-logic survives the stopping and
restarting of SBA strobes during normal operation. However, the AGP master should not depend on the
core-logic to retain the state of the “sticky” requests through any power-down mode event such as those
specified under ACPI.