Accelerated Graphics Port Interface Specification

AGP3.0 Interface Specification
Rev. 1.0
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AGP3.0 write transactions in the same order as the issued requests from the AGP3.0 Master. This
implies that a sequence of writes, AGP_write_memA/AGP_write_memB, may complete in non-
sequential order, such as memB being updated before memA.
An exception to this rule occurs when a sequence of writes target the same memory location. The
Target must ensure that a sequence of writes to the same memory location is completed in the same
order as issued by the master. For example, in the AGP sequence,
AGP_write_memA/AGP_write_memB/AGP_write_memA, the Target needs to ensure that the first
write to memA completes before the second write to memA. However, the write to memB completes
in no particular order with respect to the other two writes.
In AGP3.0, the FENCE request is required for ordering writes. The core-logic must ensure that all
AGP3.0 read and write requests prior to the issue of a FENCE will complete before any AGP3.0 read or
write requests issued after the FENCE.
A summary of the AGP3.0 ordering rules, including those that remain unchanged from AGP2.0, is as
follows:
1. AGP Reads complete in issue order on the AGP interface. However, the core-logic may fetch
data from system memory in any order.
2. AGP3.0 Writes complete in issue order on the AGP3.0 interface. However, the core-logic may
complete the writes to system memory in any order except when the writes are to the same
memory location.
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3. The core-logic must ensure that an AGP Read following an AGP Write to the same memory
address must not pass the AGP write to system memory. Similarly, an AGP Flush must not
pass any AGP Write.
4. Unless there is an intervening FENCE, an AGP Write is allowed to pass any previously issued
AGP Read, Flush or Write (not to the same address) on its way to completion
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.
5. The core-logic must ensure that no AGP Read, Write
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or Flush request that follows a FENCE,
will pass any AGP Read, Write
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or Flush request that precedes it.
6. PCI transactions initiated by the AGP Master must follow PCI ordering rules for completion.
There are no completion ordering requirements between PCI transactions and AGP
transactions.
7. Finally, AGP Fast Writes must complete on the AGP interface in the same order they are issued
by the processor.
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This is a change from AGP
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A request to system memory is considered “completed” when it reaches the point of “global visibility” where all requesting
agents have access to the latest version of the data.
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This is a change from AGP.