Accelerated Graphics Port Interface Specification

AGP3.0 Interface Specification

Rev. 1.0

2.7 Required Master and Target Registers

2.7.1 PCISTS: PCI STATUS REGISTER

Offset:

06h

Size: 2 bytes

Table 23: PCI Register

Bits Access Field Description

15:5 See the PCI Local Bus Specification.

4 R-IW CAP_LIST If the CAP_LIST bit is set, the device’s configuration space

implements a list of capabilities. The capability pointer is

located at 34h.

3:0 See the PCI Local Bus Specification.

2.7.2 CAPPTR: CAPABILITIES POINTER

Offset: 34h

Size: 1 byte

Table 24: CAPPTR Capabilities

Bits Access Field Description

7:0 R-IW CAP_PTR This field contains a byte offset into the device’s configuration

space containing the first item in the Capabilities List and is a

Read Only register.