Accelerated Graphics Port Interface Specification

AGP3.0 Interface Specification
Rev. 1.0
49
Bits Access Field Description
9 R-W-D’0 SBA_ENABLE This must be a read/write bit for software compatibility
with AGP interface specification V2.0. AGP3.0 devices are
required to support side band addressing. This bit must
be set to 1’b when AGPSTAT[3] = 1.
8 R-W-D’0 AGP_ENABLE
Master: Setting the AGP_ENABLE bit allows the master to
initiate AGP3.0 operations. When cleared, the master
cannot initiate AGP3.0 operations.
Target: Setting the AGP_ENABLE bit allows the target to
accept AGP3.0 operations. When cleared, the target
ignores incoming AGP3.0 operations. Notes:
1. The target must be completely configured and
enabled before the master is programmed.
2. A device can make no assumptions as to the
sequence of command field programming, except
that AGP_ENABLE is the last bit set. Concurrently
setting all command fields and the AGP_ENABLE bit
using a single 32-bit write is also permitted.
3. Any AGP3.0 operations received while this bit is set to
1 will be serviced even if this bit is reset to 0. If this bit
transitions from a 1 to a 0 on a clock edge in the
middle of an SBA command being delivered in
AGP3.0 mode, the command will be issued.
The AGP_ENABLE bit is cleared by power-on-reset.
7 RZ-MW Reserved Always returns 0 when read; write operations have no
effect.
6 RZ-MW Reserved Always returns 0 when read; write operations have no
effect.
5 R-W-D’0 OVER4G Master: Setting the OVER4G bit allows the master to
initiate AGP3.0 Requests to addresses above the 4 GB
address boundary. When cleared, the master is only
allowed to access addresses in the low 4 GB of the
address space.
Target: Setting the OVER4G bit enables the target to
accept a Type 4 command and to utilize A[35::32] for a
Type 3 command.
4 R-W-D’0 FW_ENABLE MASTER & TARGET: When set to 1, FW is enabled in
Master or Target.
3 RZ-MW Reserved
Always returns ‘0’ on reads. Writes are ignored.
2:0 R-W-D’000 DRATE Data Rate Enable (DRATE) - The setting of these bits
determines the data transfer rate. One (and only one) bit
in this field must be set to indicate the desired data
transfer rate. The same bit must be set on both master
and target. The encoding assumes AGP3.0_Mode is set
in AGPSTAT.
Encoding Meaning
001 4X Data Transfer Mode
010 8X Data Transfer Mode
100 Reserved