Accelerated Graphics Port Interface Specification

AGP3.0 Interface Specification
Rev. 1.0
30
Table 10: Summary of PCI Signals Based on Function and Agent
Device Graphics Core-logic
Interface PCI AGP3.0 PCI AGP3.0
AGENT
Target Master Master
FW
Target
Target Master Target
FW
Master
FRAME
R R R R R R
IRDY
R R R R R R R R
TRDY
R R R R R R R R
STOP
R R R R R R
DEVSEL
R R R R R R
IDSEL
R
1
R
2
PERR
R R O O
SERR
O O O O
REQ
R I R I
GNT
R R I R I
RST#
R R R R R R R R
AD[31::00]
R R R R R R R R
C#/BE[3::0]
R R R R R R R R
DBI_HI,
DBI_LO
R R R R R R R R
PAR
R R NS NS R R NS NS
LOCK
NS NS NS NS NS NS NS NS
INTA#
O O O R O R
INTB#
O O O R O R
CLK
R R R R R R R R
PME#
O O
Legend:
R = Required
O = Optional
I = Internal signal
NS = Not supported
A shaded cell indicates that the signal is not applicable to the function.
/ NOTE
1. IDSEL is not a signal on the connector. See Section 2.1.4 for details of how IDSEL is
implemented.
2. IDSEL is typically an internal signal for the core-logic.
Table 11: Summary of AGP3.0 Signals Based on Function and Agent
Device Graphics Core-logic
Interface PCI AGP3.0 PCI AGP3.0
Agent
Target Master Master
FW
Target
Target Master Target
FW
Master
ST[2::0]
O
3
R R R
PIPE
NS NS
SBA[7::0]#
R R
RBF
O
1
R
WBF
O
2
R
AD_STBF0
R R R R
AD_STBF1
R R R R
AD_STBS0
R R R R
AD_STBS1
R R R R
SB_STBF
R R
SB_STBS
R R