Specifications

Intel
®
Quark Core—Hardware Interface
Intel
®
Quark SoC X1000 Core
Developer’s Manual October 2013
150 Order Number: 329679-001US
9.2 Signal Descriptions
9.2.1 Clock (CLK)
CLK provides the fundamental timing and the internal operating frequency for the
Intel
®
Quark SoC X1000 Core. All external timing parameters are specified with respect
to the rising edge of CLK.
9.2.2 Address Bus (A[31:2], BE[3:0]#)
A[31:2] and BE[3:0]# form the address bus and provide physical memory and I/O port
addresses. The Intel
®
Quark SoC X1000 Core is capable of addressing 4 gigabytes of
physical memory space (00000000H through FFFFFFFFH), and 64 Kbytes of I/O
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