Specifications

Intel
®
Quark SoC X1000 Core
October 2013 Developer’s Manual
Order Number: 329679-001US 237
Bus Operation—Intel
®
Quark Core
10.4.3.4.2 Snoop under BOFF# during Replacement Write-Back
If the system snoop under BOFF# hits the line that is currently being replaced (burst or
non-burst), the entire line is written back as a snoop write-back line, and the
replacement write-back cycle is not continued. However, if the system snoop hits a
different line than the one currently being replaced, the replacement write-back cycle
continues after the snoop write-back cycle has been completed. Figure 118 shows a
system snoop hit to the same line as the one being replaced (non-burst).
Figure 118. Snoop under BOFF# to the Line that is Being Replaced
10.4.3.5 Snoop under HOLD
Note: The implementation of Intel
®
Quark Core on Intel
®
Quark SoC X1000 does not support
the HOLD mechanism.
HOLD can only fracture a non-cacheable, non-burst code prefetch cycle. For all other
cycles, the Write-Back Enhanced Intel
®
Quark SoC X1000 Core does not assert HLDA
until the entire current cycle is completed. If the system snoop hits a modified line
under HLDA during a non-cacheable, non-burstable code prefetch, the snoop write-
back cycle is reordered ahead of the fractured cycle. The fractured non-cacheable, non-
burst code prefetch resumes with an ADS# and begins with the first uncompleted
transfer. Snoops are permitted under HLDA, but write-back cycles do not occur until
HOLD is de-asserted. Consequently, multiple snoop cycles are permitted under a
continuously asserted HLDA only up to the first asserted HITM#.
CLK
BOFF#
EADS#
INV
HITM#
A31–A4
A3–A2
ADS#
12345678910111213141516171819
BLAST#
CACHE#
RDY#
BRDY#
To Processor
W/R#
0 4 8 C
Repl Wb
Repl Wb
Write Back Cycle
†
†