Specifications

Intel
®
Quark Core—Architectural Overview
Intel
®
Quark SoC X1000 Core
Developer’s Manual October 2013
36 Order Number: 329679-001US
While executing the NMI servicing procedure, the Intel
®
Quark Core will not service
further NMI requests until an interrupt return (IRET) instruction is executed or the
processor is reset (RSM in the case of SMI#). If NMI occurs while currently servicing an
NMI, its presence will be saved for servicing after executing the first IRET instruction.
The IF bit is cleared at the beginning of an NMI interrupt to inhibit further INTR
interrupts.
3.7.5 Software Interrupts
A third type of interrupt/exception for the Intel
®
Quark Core is the software interrupt.
An INT n instruction causes the processor to execute the interrupt service routine
pointed to by the nth vector in the interrupt table.
A special case of the two byte software interrupt INT n is the one byte INT 3, or
breakpoint interrupt. By inserting this one byte instruction in a program, you can set
breakpoints in your program as a debugging tool.
A final type of software interrupt is the single step interrupt. It is discussed in Section
11.2, “Single-Step Trap” on page 246.
3.7.6 Interrupt and Exception Priorities
Interrupts are externally-generated events. Maskable Interrupts (on the INTR input)
and Non-Maskable Interrupts (on the NMI input or SMI# input) are recognized at
instruction boundaries. When more than one interrupt or external event are both
recognized at the same instruction boundary, the Intel
®
Quark Core invokes the
highest priority routine first. (See list below.) If, after the NMI service routine has been
invoked, maskable interrupts are still enabled, then the Intel
®
Quark SoC X1000 Core
will invoke the appropriate interrupt service routine.
Priority for Servicing External Events for Intel
®
Quark SoC X1000 Core:
1. RESET/SRESET
2. FLUSH#
3. SMI#
4. NMI
5. INTR
6. STPCLK#
Note: STPCLK# will be recognized while in an interrupt service routine or an SMM handler.
Exceptions are internally-generated events. Exceptions are detected by the Intel
®
Quark SoC X1000 Core if, in the course of executing an instruction, the Intel
®
Quark
SoC X1000 Core detects a problematic condition. The Intel
®
Quark SoC X1000 Core
then immediately invokes the appropriate exception service routine. The state of the
Intel
®
Quark SoC X1000 Core is such that the instruction causing the exception can be
restarted. If the exception service routine has taken care of the problematic condition,
the instruction will execute without causing the same exception.
It is possible for a single instruction to generate several exceptions (for example,
transferring a single operand could generate two page faults if the operand location
spans two “not present” pages). However, only one exception is generated upon each
attempt to execute the instruction. Each exception service routine should correct its
corresponding exception, and restart the instruction. In this manner, exceptions are
serviced until the instruction executes successfully.