Specifications

ManualsBrandsIntel Manualscomputer componentsGalileo Board

Intel

Quark Core—System Register Organization

Intel

Quark SoC X1000 Core

Developer’s Manual October 2013

50 Order Number: 329679-001US

TS (Task Switch, bit 3)

•Intel

Quark SoC X1000 Core TS bit:

For Intel

Quark SoC X1000 Core, the TS bit is set whenever a task switch

operation is performed. Execution of floating-point instructions with TS=1 causes a

Device Not Available (DNA) fault (trap vector 7). If TS=1 and MP=1 (monitor

coprocessor in CR0), a WAIT instruction causes a DNA fault.

EM (Emulate Coprocessor, bit 2)

•Intel

Quark SoC X1000 Core EM bit:

For Intel

Quark SoC X1000 Core, the EM bit determines whether floating-point

instructions are trapped (EM=1) or executed. If EM=1, all floating-point

instructions cause fault 7.

If EM=0, the on-chip floating-point is used.

Note: WAIT instructions are not affected by the state of EM. (See Table 13.)

MP (Monitor Coprocessor, bit 1)

•Intel

Quark SoC X1000 Core MP bit:

For the Intel

Quark SoC X1000 Core, the MP is used in conjunction with the TS bit

to determine whether WAIT instructions cause fault 7. (See Table 13.) The TS bit is

set to 1 on task switches by the Intel

Quark SoC X1000 Core. Floating-point

instructions are not affected by the state of the MP bit. It is recommended that the

MP bit be set to one for normal processor operation.

PE (Protection Enable, bit 0)

The PE bit enables the segment based protection mechanism when PE=1 protection

is enabled. When PE=0 the Intel

Quark SoC X1000 Core operates in Real Mode.

(Refer to Table 10.)

Table 12. Recommended Values of the Floating-Point Related Bits for Intel

Quark SoC

X1000 Core

CR0 Bit Intel

Quark SoC X1000 Core

EM 0

MP 1

NE 0 for DOS Systems; 1 for User-Defined Exception Handler

Table 13. Interpreting Different Combinations of EM, TS and MP Bits (Sheet 1 of 2)

CR0 Bit Instruction Type

EM TS MP Floating-Point Wait

000ExecuteExecute

001ExecuteExecute

010Exception 7Execute

0 1 1 Exception 7 Exception 7

100Exception 7Execute

Note: For Intel

Quark SoC X1000 Core, when MP=1 and TS=1, the processor generates a trap 7 so that

the system software can save the floating-point status of the old task.