Specifications

Intel
®
Quark SoC X1000 Core
October 2013 Developer’s Manual
Order Number: 329679-001US 55
System Register Organization—Intel
®
Quark Core
Figure 17. Floating-Point Status Word
A5152-01
0715
B
P
E
C
3
C
0
E
S
S
F
U
E
O
E
Z
E
D
E
I
E
Invalid Operation
Denormalized Operand
Zero Divide
Overflow
Underflow
Precision
Exception Flags:
Stack Flag
Error Summary Status
C
2
C
1
Busy
Condition Code
Top of Stack Pointer
ES is set if any unmasked exception bit is set; cleared otherwise.
See Table 4-7 for interpretation of condition code.
Top Values:
000 = Register 0 is Top of Stack
001 = Register 1 is Top of Stack
*
*
*
111 = Register 7 is Top of Stack
TOP
For definitions of exceptions, refer to the section entitled, "Exception Handling".
Note:
The B-bit (Busy, bit 15) is included for 8087 compatibility. The B-bit reflects the contents of the ES
bit (bit 7 of the status word).
Bits 13-11 (TOP) point to the FPU register that is the current top-of-stack.
The four numeric condition code bits, C0-C3, are similar to the flags in EFLAGS. Instructions that
perform arithmetic operations update C0-C3 to reflect the outcome. The effects of these
instructions on the condition codes are summarized in Table 4-7 through Table 4-10.
See Table 14 for interpretation of condition code.