Specifications

Intel
®
Quark SoC X1000 Core
October 2013 Developer’s Manual
Order Number: 329679-001US 65
Real Mode Architecture—Intel
®
Quark Core
5.0 Real Mode Architecture
5.1 Introduction
When the Intel
®
Quark SoC X1000 Core is powered up or reset, it is initialized in Real
Mode. Real Mode allows access to the 32-bit register set of the Intel
®
Quark SoC X1000
Core.
All of the Intel
®
Quark SoC X1000 Core instructions are available in Real Mode (except
those instructions listed in Section 6.5.4, “Protection and I/O Permission Bitmap” on
page 109). The default operand size in Real Mode is 16 bits. In order to use the 32-bit
registers and addressing modes, override prefixes must be used. Also, the segment
size on the Intel
®
Quark SoC X1000 Core in Real Mode is 64 Kbytes, forcing 32-bit
effective addresses to have a value less than 0000FFFFH. The primary purpose of Real
Mode is to enable Protected Mode operation.
Due to the addition of paging on the Intel
®
Quark SoC X1000 Core in Protected Mode
and Virtual 8086 Mode, it is impossible to guarantee that repeated string instructions
can be LOCKed. The Intel
®
Quark SoC X1000 Core cannot require that all pages
holding the string be physically present in memory. Hence, a Page Fault (exception 14)
might have to be taken during the repeated string instruction. Therefore, the LOCK
prefix can not be supported during repeated string instructions.
Table 24 lists the only instruction forms in which the LOCK prefix is legal on the Intel
®
Quark SoC X1000 Core.
An exception 6 is generated if a LOCK prefix is placed before any instruction form or
opcode not listed Table 24. The LOCK prefix allows indivisible read/modify/write
operations on memory operands using the instructions Table 24. For example, even the
ADD Reg, Mem instruction is not LOCKable, because the Mem operand is not the
destination (and therefore no memory read/modify/operation is being performed).
On the Intel
®
Quark SoC X1000 Core, repeated string instructions are not LOCKable;
therefore, it is not possible to LOCK the bus for a long period of time. Therefore, the
LOCK prefix is not IOPL-sensitive on the Intel
®
Quark SoC X1000 Core. The LOCK
prefix can be used at any privilege level, but only on the instruction forms listed in
Table 24.
Table 24. Instruction Forms in which LOCK Prefix Is Legal
Opcode Operands (Dest, Source)
BIT Test and SET/RESET/COMPLEMENT Mem, Reg/immed.
XCHG Reg, Mem
CHG Mem, Reg
ADD, OR, ADC, SBB, AND, SUB, XOR Mem, Reg/immed.
NOT, NEG, INC, DEC Mem
CMPXCHG, XADD Mem, Reg