Specifications

Intel
®
Quark Core—Real Mode Architecture
Intel
®
Quark SoC X1000 Core
Developer’s Manual October 2013
66 Order Number: 329679-001US
5.2 Memory Addressing
In Real Mode, the maximum memory size is limited to 1 Mbyte. (See Figure 23.) Thus,
only address lines A[19:2] are active with this exception: after RESET address lines
A[31:20] are high during CS-relative memory cycles until an intersegment jump or call
is executed. See Section 9.5, “Reset and Initialization” on page 169.
Because paging is not allowed in Real Mode, the linear addresses are the same as the
physical addresses. Physical addresses are formed in Real Mode by adding the contents
of the appropriate segment register, which is shifted left by four bits to create an
effective address. This addition results in a physical address from 00000000H to
0010FFEFH. This is compatible with 80286 Real Mode. Because segment registers are
shifted left by 4 bits, Real Mode segments always start on 16-byte boundaries.
All segments in Real Mode are exactly 64-Kbytes long, and may be read, written, or
executed. The Intel
®
Quark SoC X1000 Core generates an exception 13 if a data
operand or instruction fetch occurs past the end of a segment (i.e., if an operand has
an offset greater than FFFFH, as when a word has a low byte at FFFFH and the high
byte at 0000H).
Segments may be overlapped in Real Mode. If a segment does not use all 64 Kbytes,
another segment can be overlaid on top of the unused portion of the previous segment.
This allows the programmer to minimize the amount of physical memory needed for a
program.
5.3 Reserved Locations
There are two fixed areas in memory that are reserved in Real Address Mode: the
system initialization area and the interrupt table area. Locations 00000H through
003FFH are reserved for interrupt vectors. Each one of the 256 possible interrupts has
a 4-byte jump vector reserved for it. Locations FFFFFFF0H through FFFFFFFFH are
reserved for system initialization.
Figure 23. Real Address Mode Addressing