Specifications
Intel
®
 Quark Core—Protected Mode Architecture
Intel
®
 Quark SoC X1000 Core
Developer’s Manual October 2013
72 Order Number: 329679-001US
Figure 27. Interrupt Descriptor Table Register Use
6.2.4 Descriptors
6.2.4.1 Descriptor Attribute Bits
The object to which the segment selector points to is called a descriptor. Descriptors 
are eight-byte quantities that contain attributes about a given region of linear address 
space (i.e., a segment). These attributes include the 32-bit base linear address of the 
segment; the 20-bit length and granularity of the segment; the protection level; read, 
write or execute privileges; the default size of the operands (16-bit or 32-bit); and the 
type of segment. All attribute information about a segment is contained in 12 bits in the 
segment descriptor. All segments on the Intel
®
 Quark SoC X1000 Core have three 
attribute fields in common: the Present (P) bit, the Descriptor Privilege Level (DPL) bit, 
and the Segment (S) bit. The P bit is 1 if the segment is loaded in physical memory. If 
P=0, any attempt to access this segment causes a not present exception (exception 
11). The DPL is a two-bit field that specifies the protection level 0–3 associated with a 
segment.
The Intel
®
 Quark SoC X1000 Core has two main categories of segments: system 
segments and non-system segments (for code and data). The S bit in the segment 
descriptor determines if a given segment is a system segment or a code or data 
segment. If the S bit is 1, the segment is either a code or data segment. If it is 0, the 
segment is a system segment.
6.2.4.2 Intel
®
 Quark Core Code, Data Descriptors (S=1)
Figure 28 shows the general format of a code and data descriptor and Table 26 
illustrates how the bits in the Access Rights Byte are interpreted. The Access Rights 
Bytes are bits 31:24 associated with the segment limit.
Code and data segments have several descriptor fields in common. The accessed (A) 
bit is set whenever the processor accesses a descriptor. The A bit is used by operating 
systems to keep usage statistics on a given segment. The G bit, or granularity bit, 
specifies if a segment length is byte-granular or page-granular. Intel
®
 Quark SoC 
X1000 Core segments can be one Mbyte long with byte granularity (G=0) or four 
Gbytes with page granularity (G=1), (i.e., 220 pages, each page 4 Kbytes long). The 
Memory
A5212-01
IDT
Limit
015
Interrupt
Descriptor
Table (DT)
Increasing
Memory
Addresses
IDT Base
031
Processor
Gate for
Interrupt #0
Gate for
Interrupt #1
Gate for
Interrupt #n-1
Gate for
Interrupt #n










