Specifications

Intel
®
Quark SoC X1000 Core
October 2013 Developer’s Manual
Order Number: 329679-001US 189
Bus Operation—Intel
®
Quark Core
Table 64. Generating A1, BHE# and BLE# for Addressing 16-Bit Devices
Intel
®
Quark SoC X1000 Core 8-, 16-Bit Bus Signals
Comments
BE3# BE2# BE1# BE0# A1
3
BHE#
2
BLE# (A0)
1
1† 1† 1† 1† x x x x–no asserted bytes
111001 0
110100 1
110000 0
101111 0
1† 0† 1† 0† x x x x–not contiguous bytes
100100 1
100000 0
011110 1
0† 1† 1† 0† x x x x–not contiguous bytes
0† 1† 0† 1† x x x x–not contiguous bytes
0† 1† 0† 0† x x x x–not contiguous bytes
0 1110 0
0† 0† 1† 0† x x x x–not contiguous bytes
000100 1
000000 0
Notes:
1. BLE# asserted when D[7:0] of 16-bit bus is asserted.
2. BHE# asserted when D[15:8] of 16-bit bus is asserted.
3. A1 low for all even words; A1 high for all odd words.
KEY:
x = don't care
† = non-occurring pattern of byte enables; either none are asserted or the pattern has byte enables
asserted for non-contiguous bytes