Specifications

Intel
®
Quark Core—Bus Operation
Intel
®
Quark SoC X1000 Core
Developer’s Manual October 2013
236 Order Number: 329679-001US
Figure 117. Snoop under BOFF# during a Cache Line-Fill Cycle
An ADS# is always issued when a cycle resumes after being fractured by BOFF#. The
address of the fractured data transfer is reissued under this ADS#, and CACHE# is not
issued unless the fractured operation resumes from the first transfer (e.g., first
doubleword). If the system asserts BOFF# and RDY# simultaneously, as shown in clock
four on Figure 117, BOFF# dominates and RDY# is ignored. Consequently, the Write-
Back Enhanced Intel
®
Quark SoC X1000 Core accepts only up to the x4h doubleword,
and the line fill resumes with the x0h doubleword. ADS# initiates the resumption of the
line-fill operation in clock period 15. HITM# is de-asserted in the clock period following
the clock period in which the last RDY# or BRDY# of the write-back cycle is asserted.
Hence, HITM# is guaranteed to be de-asserted before the ADS# of the next cycle.
Figure 117 also shows the system asserting RDY# to indicate a non-burst line-fill cycle.
Burst cache line-fill cycles behave similarly to non-burst cache line-fill cycles when
snooping using BOFF#. If the system snoop hits the same line as the line being filled
(burst or non-burst), the Write-Back Enhanced Intel
®
Quark SoC X1000 Core does not
assert HITM# and does not issue a snoop write-back cycle, because the line was not
modified, and the line fill resumes upon the de-assertion of BOFF#. However, the line
fill is cached only if INV is driven low during the snoop cycle.
242202-154
CLK
BOFF#
EADS#
INV
HITM#
ADS#
BLAST#
To Processor
1 2 3 4 5 6 7 8 9 101112131415 161718 1920212223
A31–A4
A3–A2
RDY#
CACHE#
W/R#
BRDY#
Linefill
Write Back Cycle Line Fill Cycle Cont.
40 04C80C8
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