Specifications

Intel
®
Quark SoC X1000 Core
October 2013 Developer’s Manual
Order Number: 329679-001US 269
Instruction Set Summary—Intel
®
Quark Core
TEST = Logical Compare
reg1 and reg2 1000 010w : 11 reg1 reg2 1
memory and register 1000 010w : mod reg r/m 2 2
immediate and register 1111 011w : 11 000 reg : immediate data 1
immediate and acc. 1010100w : immediate data 1
immediate and memory
1111 011w : mod 000 r/m : immediate
data
22
MUL = Multiply (unsigned)
acc. with register 1111 011w : 11 100 reg
Multiplier-Byte
Word
Dword
13/18
13/26
13/42
MN/MX,3
MN/MX,3
MN/MX,3
acc. with memory 1111 011w : mod 100 r/m
Multiplier-Byte
Word
Dword
13/18
13/26
13/42
1
1
1
MN/MX,3
MN/MX,3
MN/MX,3
IMUL = Integer Multiply (unsigned)
acc. with register 1111 011w : 11 101 reg
Multiplier-Byte
Word
Dword
13/18
13/26
13/42
MN/MX,3
MN/MX,3
MN/MX,3
acc. with memory 1111 011w : mod 101 r/m
Multiplier-Byte
Word
Dword
13/18
13/26
13/42
MN/MX,3
MN/MX,3
MN/MX,3
reg1 with reg2 0000 1111 : 10101111 : 11 reg1 reg2
Multiplier-Byte
Word
Dword
13/18
13/26
13/42
MN/MX,3
MN/MX,3
MN/MX,3
register with memory 0000 1111 : 10101111 : mod reg r/m
Multiplier-Byte
Word
Dword
13/18
13/26
13/42
1
1
1
MN/MX,3
MN/MX,3
MN/MX,3
reg1 with imm. to reg2
0110 10s1 : 11 reg1 reg2 : immediate
data
Multiplier-Byte
Word
Dword
13/18
13/26
13/42
MN/MX,3
MN/MX,3
MN/MX,3
mem. with imm. to reg.
0110 10s1 : mod reg r/m : immediate
data
Multiplier-Byte
Word
Dword
13/18
13/26
13/42
MN/MX,3
MN/MX,3
MN/MX,3
Table 89. Clock Count Summary (Sheet 3 of 13)
Instruction Format
Cache
Hit
Penalty
if
Cache
Miss
Notes
Note: See Table 92 for notes and abbreviations for items in this table.