Specifications

Intel
®
Quark Core—Instruction Set Summary
Intel
®
Quark SoC X1000 Core
Developer’s Manual October 2013
280 Order Number: 329679-001US
Protected Mode
Interrupt/Trap gate, same level
Interrupt/Trap gate, different level
Task Gate
44
71
37 + TS
6
17
3
9
9
9, 10
Virtual Mode
Interrupt/Trap gate, different level
Task Gate
82
37 + TS
17
310
Note: See Table 92 for definitions and notes for items in this table.
Table 91. Interrupt Clock Counts (Sheet 2 of 2)
Method
Value for INT
Cache Hit Miss Penalty Notes
Table 92. Notes and Abbreviations (for Table 89 through Table 91) (Sheet 1 of 2)
The following abbreviations are used in Table 89 through Table 91:
Abbreviation
16/32
U/L
MN/MX
L/NL
RV/P
R
P
T/NT
H/NH
Definition
16/32 bit modes
unlocked/locked
minimum/maximum
loop/no loop
real and virtual mode/protected mode
real mode
protected mode
taken/not taken
hit/no hit
The following notes refer to Table 89 through Table 91.