Specifications

Intel

Quark SoC X1000 Core

October 2013 Developer’s Manual

Order Number: 329679-001US 77

Protected Mode Architecture—Intel

Quark Core

6.2.4.7 Selector Fields

A selector in Protected Mode has three fields: Local or Global Descriptor Table Indicator

(TI), Descriptor Entry Index (Index), and Requester (the selector's) Privilege Level

(RPL) as shown in Figure 31. The TI bits select one of two memory-based tables of

descriptors (the Global Descriptor Table or the Local Descriptor Table). The Index

selects one of 8 K descriptors in the appropriate descriptor table. The RPL bits allow

high speed testing of the selector's privilege attributes.

6.2.4.8 Segment Descriptor Cache

In addition to the selector value, every segment register has a segment descriptor

cache register associated with it. Whenever a segment register's contents are changed,

the 8-byte descriptor associated with that selector is automatically loaded (cached) on

the chip. Once loaded, all references to that segment use the cached descriptor

information instead of re-accessing the descriptor. The contents of the descriptor cache

are not visible to the programmer. Because descriptor caches only change when a

segment register is changed, programs that modify the descriptor tables must reload

the appropriate segment registers after changing a descriptor’s value.

6.2.4.9 Segment Descriptor Register Settings

The contents of the segment descriptor cache vary depending on the mode in which the

Intel

Quark SoC X1000 Core is operating. When operating in Real Address Mode, the

segment base, limit, and other attributes within the segment cache registers are

defined as shown in Figure 32. For backwards compatibility with older architecture, the

base is set to 16 times the current selector value, the limit is fixed at 0000FFFFH, and

the attributes are fixed to indicate that the segment is present and fully usable. In Real

Address Mode, the internal “privilege level” is always fixed to the highest level, level 0,

so I/O and other privileged opcodes may be executed.