User's Manual

Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
September 2006 DM
Order Number: 252480-006US 375
Internal Bus Performance Monitoring Unit (IBPMU)—Intel
®
IXP42X product line and IXC1100
control plane processors
For a duration event, the programmable event counters will count the number of clocks
during which a particular condition or set of conditions is valid. Duration measurements
examples include:
• Bus Acquisition Latency — The elapsed time between when an AHB bus initiator
issues a request for the AHB bus, to when the AHB bus initiator is granted the AHB
bus.
• Split Transfer Latency — The elapsed time between when the bus initiator that
issued a split request receives a split response from the target that completed the
split transfer and the first DWORD of data read is received.
• Bus Ownership Time — The elapsed time that an initiator is in control of the bus.
• Initiator Bus Data Transfer Time — The elapsed time that an initiator takes to
transfers data.
• Split Data Transfer Time — The elapsed time during which a split transfer target
transfers data (data read) to a split transfer initiator. (Note that this metric is
associated with the split transfer initiator and not the split transfer target.)
Table 141 lists the various duration events that may be monitored by the IXP42X
product line and IXC1100 control plane processors.
In addition to the programmable event counters, the IXP42X product line and IXC1100
control plane processors has the ability to determine the last initiator and target that
controlled the North AHB and South AHB. The information can be obtained by reading
the previous master and slave register (PMSR).
11.2.1 Monitored Events South AHB and North AHB
Table 142 describes the events that can be monitored on the South AHB and North
AHB.
Table 141. Duration Events
Observed
interface
Monitored Event
AHB_South
Number of clocks the AHB bus is doing Data Writes
Number of clocks the AHB bus is doing Data Reads
Number of clocks the AHB bus is Idle
Bus acquisition latency for AHB_South_Agents (Intel XScale processor, AHB_Bridge,
APB bridge, PCI_Bus)
Bus ownership metrics for AHB_South_Agents (Intel XScale processor, AHB_Bridge,
APB bridge, PCI_Bus)
Initiator data transfer time for AHB_Agents (Intel XScale processor, AHB_Bridge, APB
bridge, PCI_Bus)
AHB_North
Number of clocks the AHB bus is doing Data Writes
Number of clocks the AHB bus is doing Data Reads
Number of clocks the AHB bus is Idle
Bus acquisition latency for AHB_North_Agents (NPE A, NPE B, NPE C)
Bus ownership metrics for AHB_North_Agents (NPE A, NPE B, NPE C)
Initiator data transfer time for AHB_North_Agents (NPE A, NPE B, NPE C)
Number of clocks the AHB_Bus is doing Data Reads during a split transfer claimed by an
AHB_North_Bus slave: ABB