User's Manual

8-4 Vol. 3
MULTIPLE-PROCESSOR MANAGEMENT
the hardware designer to make the LOCK# signal available in system hardware to
control memory accesses among processors.
For the P6 and more recent processor families, if the memory area being accessed is
cached internally in the processor, the LOCK# signal is generally not asserted;
instead, locking is only applied to the processor’s caches (see Section 8.1.4, “Effects
of a LOCK Operation on Internal Processor Caches”).
8.1.2.1 Automatic Locking
The operations on which the processor automatically follows the LOCK semantics are
as follows:
• When executing an XCHG instruction that references memory.
• When setting the B (busy) flag of a TSS descriptor — The processor tests
and sets the busy flag in the type field of the TSS descriptor when switching to a
task. To insure that two processors do not switch to the same task simulta-
neously, the processor follows the LOCK semantics while testing and setting this
flag.
• When updating segment descriptors — When loading a segment descriptor,
the processor will set the accessed flag in the segment descriptor if the flag is
clear. During this operation, the processor follows the LOCK semantics so that the
descriptor will not be modified by another processor while it is being updated. For
this action to be effective, operating-system procedures that update descriptors
should use the following steps:
— Use a locked operation to modify the access-rights byte to indicate that the
segment descriptor is not-present, and specify a value for the type field that
indicates that the descriptor is being updated.
— Update the fields of the segment descriptor. (This operation may require
several memory accesses; therefore, locked operations cannot be used.)
— Use a locked operation to modify the access-rights byte to indicate that the
segment descriptor is valid and present.
• The Intel386 processor always updates the accessed flag in the segment
descriptor, whether it is clear or not. The Pentium 4, Intel Xeon, P6 family,
Pentium, and Intel486 processors only update this flag if it is not already set.
• When updating page-directory and page-table entries — When updating
page-directory and page-table entries, the processor uses locked cycles to set
the accessed and dirty flag in the page-directory and page-table entries.
• Acknowledging interrupts — After an interrupt request, an interrupt controller
may use the data bus to send the interrupt vector for the interrupt to the
processor. The processor follows the LOCK semantics during this time to ensure
that no other data appears on the data bus when the interrupt vector is being
transmitted.