User's Manual

15-28 Vol. 3

MACHINE-CHECK ARCHITECTURE

15.7 MACHINE-CHECK AVAILABILITY

The machine-check architecture and machine-check exception (#MC) are

model-specific features. Software can execute the CPUID instruction to

determine whether a processor implements these features. Following the

execution of the CPUID instruction, the settings of the MCA flag (bit 14) and

MCE flag (bit 7) in EDX indicate whether the processor implements the

machine-check architecture and machine-check exception.

15.8 MACHINE-CHECK INITIALIZATION

To use the processors machine-check architecture, software must initialize

the processor to activate the machine-check exception and the error-

reporting mechanism.

Example 15-1 gives pseudocode for performing this initialization. This

pseudocode checks for the existence of the machine-check architecture and

exception; it then enables machine-check exception and the error-reporting

Intel Xeon, P6 family, and Pentium processors.

Following power up or power cycling, IA32_MCi_STATUS registers are not

guaranteed to have valid data until after they are initially cleared to zero by

software (as shown in the initialization pseudocode in

Example 15-1). In

addition, when using P6 family processors, software must set MCi_STATUS

registers to zero when doing a soft-reset.

Example 15-1. Machine-Check Initialization Pseudocode

Check CPUID Feature Flags for MCE and MCA support

IF CPU supports MCE

THEN

IF CPU supports MCA

THEN

IF (IA32_MCG_CAP.MCG_CTL_P = 1)

(* IA32_MCG_CTL register is present *)

THEN

IA32_MCG_CTL ← FFFFFFFFFFFFFFFFH;