User's Manual

Vol. 3 15-31
MACHINE-CHECK ARCHITECTURE
15.9.2 Compound Error Codes
Compound error codes describe errors related to the TLBs, memory, caches,
bus and interconnect logic, and internal timer. A set of sub-fields is common
to all of compound errors. These sub-fields describe the type of access, level
in the cache hierarchy, and type of request.
Table 15-9 shows the general
form of the compound error codes.
The “Interpretation” column in the table indicates the name of a compound
error. The name is constructed by substituting mnemonics for the sub-field
names given within curly braces. For example, the error code
ICACHEL1_RD_ERR is constructed from the form:
{TT}CACHE{LL}_{RRRR}_ERR,
where {TT} is replaced by I, {LL} is replaced by L1, and {RRRR} is replaced by RD.
For more information on the “Form” and “Interpretation” columns, see
Sections
Section 15.9.2.1, “Correction Report Filtering (F) Bit” through
Section 15.9.2.5, “Bus and Interconnect Errors”.
15.9.2.1 Correction Report Filtering (F) Bit
Starting with Intel Core Duo processors, bit 12 in the “Form” column in Table
15-9 is used to indicate that a particular posting to a log may be the last
posting for corrections in that line/entry, at least for some time:
• 0 in bit 12 indicates “normal” filtering (original P6/Pentium4/Xeon processor
meaning).
• 1 in bit 12 indicates “corrected” filtering (filtering is activated for the line/entry in
the posting). Filtering means that some or all of the subsequent corrections to
this entry (in this structure) will not be posted. The enhanced error reporting
introduced with the Intel Core Duo processors is based on tracking the lines
affected by repeated corrections (see
Section 15.4, “Enhanced Cache Error
reporting”). This capability is indicated by IA32_MCG_CAP[11]. Only the first few
correction events for a line are posted; subsequent redundant correction events
to the same line are not posted. Uncorrected events are always posted.
Table 15-9. IA32_MCi_Status [15:0] Compound Error Code Encoding
Type Form Interpretation
Generic Cache Hierarchy 000F 0000 0000 11LL Generic cache hierarchy error
TLB Errors 000F 0000 0001 TTLL {TT}TLB{LL}_ERR
Memory Controller Errors 000F 0000 1MMM CCCC {MMM}_CHANNEL{CCCC}_ERR
Cache Hierarchy Errors 000F 0001 RRRR TTLL {TT}CACHE{LL}_{RRRR}_ERR
Bus and Interconnect Errors 000F 1PPT RRRR IILL BUS{LL}_{PP}_{RRRR}_{II}_{T}_ERR