User's Manual

Vol. 3 16-11
DEBUGGING, PROFILING BRANCHES AND TIME-STAMP COUNTER
(resume flag) in the EFLAGS register (see Section 2.3, “System Flags and Fields in
the EFLAGS Register,” in the Intel® 64 and IA-32 Architectures Software Developer’s
Manual, Volume 3A). When the RF flag is set, the processor ignores instruction
breakpoints.
All Intel 64 and IA-32 processors manage the RF flag as follows. The RF Flag is
cleared at the start of the instruction after the check for code breakpoint, CS limit
violation and FP exceptions. Task Switches and IRETD/IRETQ instructions transfer
the RF image from the TSS/stack to the EFLAGS register.
When calling an event handler, Intel 64 and IA-32 processors establish the value of
the RF flag in the EFLAGS image pushed on the stack:
• For any fault-class exception except a debug exception generated in response to
an instruction breakpoint, the value pushed for RF is 1.
• For any interrupt arriving after any iteration of a repeated string instruction but
the last iteration, the value pushed for RF is 1.
• For any trap-class exception generated by any iteration of a repeated string
instruction but the last iteration, the value pushed for RF is 1.
• For other cases, the value pushed for RF is the value that was in EFLAG.RF at the
time the event handler was called. This includes:
— Debug exceptions generated in response to instruction breakpoints
— Hardware-generated interrupts arriving between instructions (including
those arriving after the last iteration of a repeated string instruction)
— Trap-class exceptions generated after an instruction completes (including
those generated after the last iteration of a repeated string instruction)
— Software-generated interrupts (RF is pushed as 0, since it was cleared at the
start of the software interrupt)
As noted above, the processor does not set the RF flag prior to calling the debug
exception handler for debug exceptions resulting from instruction breakpoints. The
debug exception handler can prevent recurrence of the instruction breakpoint by
setting the RF flag in the EFLAGS image on the stack. If the RF flag in the EFLAGS
image is set when the processor returns from the exception handler, it is copied into
the RF flag in the EFLAGS register by IRETD/IRETQ or a task switch that causes the
return. The processor then ignores instruction breakpoints for the duration of the
next instruction. (Note that the POPF, POPFD, and IRET instructions do not transfer
the RF image into the EFLAGS register.) Setting the RF flag does not prevent other
types of debug-exception conditions (such as, I/O or data breakpoints) from being
detected, nor does it prevent non-debug exceptions from being generated.
For the Pentium processor, when an instruction breakpoint coincides with another
fault-type exception (such as a page fault), the processor may generate one spurious
debug exception after the second exception has been handled, even though the
debug exception handler set the RF flag in the EFLAGS image. To prevent a spurious
exception with Pentium processors, all fault-class exception handlers should set the
RF flag in the EFLAGS image.