User's Manual

Vol. 3 16-23
DEBUGGING, PROFILING BRANCHES AND TIME-STAMP COUNTER
PEBS absolute maximum Linear address of the next byte past the end of the
PEBS buffer. This address should be a multiple of the PEBS record size (40 bytes)
plus 1.
PEBS interrupt threshold — Linear address of the PEBS record on which an
interrupt is to be generated. This address must point to an offset from the PEBS
buffer base that is a multiple of the PEBS record size. Also, it must be several
records short of the PEBS absolute maximum address to allow a pending
interrupt to be handled prior to processor writing the PEBS absolute maximum
record.
Figure 16-5. DS Save Area
BTS Buffer Base
BTS Index
BTS Absolute
BTS Interrupt
PEBS Absolute
PEBS Interrupt
PEBS
Maximum
Maximum
Threshold
PEBS Index
PEBS Buffer Base
Threshold
Counter Reset
Reserved
0H
4H
8H
CH
10H
14H
18H
1CH
20H
24H
30H
Branch Record 0
Branch Record 1
Branch Record n
PEBS Record 0
PEBS Record 1
PEBS Record n
BTS Buffer
PEBS Buffer
DS Buffer Management Area
IA32_DS_AREA MSR