Datasheet

Register Description
12 Intel
®
Xeon
®
Processor 5600 Series Datasheet Volume 2
Notes:
1. Applies only to processors with two Intel QPI links.
2. Applies only to processors supporting sparing, mirroring and scrubbing RAS features.
Table 2-1. Functions Specifically Handled by the Processor
Component Register Group DID Device
Functio
n
Processor Intel® QuickPath Architecture Generic Non-core Registers 2C70h 0 0
Intel® QuickPath Architecture System Address Decoder 2D81h 1
Intel® QuickPath Interconnect (Intel® QPI) Link 0 2D90h 2 0
Intel QPI Physical 0 2D91h 1
Mirror Port Link 0 2D92h 2
Mirror Port Link 1 2D93h 3
Intel QPI Link 1 2D94h 4
1
Intel QPI Physical 1 2D95h 5
1
Integrated Memory Controller Registers 2D98h 3 0
Integrated Memory Controller Target Address Decoder 2D99h 1
Integrated Memory Controller RAS Registers 2D9Ah 2
2
Integrated Memory Controller Test Registers 2D9Ch 4
Integrated Memory Controller Channel 0 Control 2DA0h 4 0
Integrated Memory Controller Channel 0 Address 2DA1h 1
Integrated Memory Controller Channel 0 Rank 2DA2h 2
Integrated Memory Controller Channel 0 Thermal Control 2DA3h 3
Integrated Memory Controller Channel 1 Control 2DA8h 5 0
Integrated Memory Controller Channel 1 Address 2DA9h 1
Integrated Memory Controller Channel 1 Rank 2DAAh 2
Integrated Memory Controller Channel 1 Thermal Control 2DABh 3
Integrated Memory Controller Channel 2 Control 2DB0h 6 0
Integrated Memory Controller Channel 2 Address 2DB1h 1
Integrated Memory Controller Channel 2 Rank 2DB2h 2
Integrated Memory Controller Channel 2 Thermal Control 2DB3h 3