Datasheet

28 Specification Update

V35.

Parity Error in the L1 Cache may Cause the Processor to Hang

Problem: If a locked operation accesses a line in the L1 cache that has a parity error, it is possible that the

processor may hang while trying to evict the line.

Implication: If this erratum occurs, it may result in a system hang. Intel has not observed this erratum with any

commercially available software.

Workaround: None.

Status: For the steppings affected, see the Summary Tables of Changes.

V36. The TCK Input in the Test Access Port (TAP) is Sensitive to Low Clock Edge

Rates and Prone to Noise Coupling Onto TCK's Rising or Falling Edges

Problem: TCK is susceptible to double clocking when low-amplitude noise is riding on TCK edge, while it is

crossing the receiver's transition region. TAP failures tend to increase with increases in background

system noise.

Implication: This only impacts JTAG/TAP accesses to the processor. Other bus accesses are not affected.

Workaround: To minimize the effects of this issue, reduce noise on the TCK-net at the processor relative to ground,

and position TCK relative to BCLK to minimize the TAP error rate. Decreasing rise times to under

800ps reduced the failure rate but does not stop all failures.

Status: For the steppings affected, see the Summary Tables of Changes.

V37. The State of the Resume Flag (RF Flag) in a Task-State Segment (TSS) May be

Incorrect

Problem: After executing a JMP instruction to the next (or other) task through a hardware task switch, it is

possible for the state of the RF flag (in the EFLAGS register image) to be incorrect.

Implication: The RF flag is normally used for code breakpoint management during debug of an application. It is not

typically used during normal program execution. Code breakpoints or single step debug behavior in the

presence of hardware task switches, therefore, may be unpredictable as a result of this erratum. This

erratum has not been observed in commercially available software.

Workaround: None.

Status: For the steppings affected, see the Summary Tables of Changes.