Datasheet

Dual-Core Intel
®
Itanium
®
Processor 9000 and 9100 Series Datasheet 95
Signals Reference
During power-on configuration, the priority agent must assert the BR[0]# bus signal.
All symmetric agents sample their BR[3:0]# pins on asserted-to-deasserted transition
of RESET#. The pin on which the agent samples an asserted level determines its agent
ID. All agents then configure their pins to match the appropriate bus signal protocol as
shown in Table A-6.
A.1.15 BREQ[3:0]# (I/O)
The BREQ[3:0]# signals are the symmetric agent arbitration bus signals (called bus
request). A symmetric agent n arbitrates for the bus by asserting its BREQn# signal.
Agent n drives BREQn# as an output and receives the remaining BREQ[3:0]# signals
as inputs.
The symmetric agents support distributed arbitration based on a round-robin
mechanism. The rotating ID is an internal state used by all symmetric agents to track
the agent with the lowest priority at the next arbitration event. At power-on, the
rotating ID is initialized to three, allowing agent 0 to be the highest priority symmetric
agent. After a new arbitration event, the rotating ID of all symmetric agents is updated
to the agent ID of the symmetric owner. This update gives the new symmetric owner
lowest priority in the next arbitration event.
A new arbitration event occurs either when a symmetric agent asserts its BREQn# on
an Idle bus (all BREQ[3:0]# previously deasserted), or the current symmetric owner
deasserts BREQn# to release the bus ownership to a new bus owner n. On a new
arbitration event, all symmetric agents simultaneously determine the new symmetric
owner using BREQ[3:0]# and the rotating ID. The symmetric owner can park on the
bus (hold the bus) provided that no other symmetric agent is requesting its use. The
symmetric owner parks by keeping its BREQn# signal asserted. On sampling BREQn#
asserted by another symmetric agent, the symmetric owner deasserts BREQn# as soon
as possible to release the bus. A symmetric owner stops issuing new requests that are
not part of an existing locked operation on observing BPRI# asserted.
Table A-4. BR0# (I/O), BR1#, BR2#, BR3# Signals for 4P Rotating Interconnect
Bus Signal Agent 0 Pins Agent 1 Pins Agent 2 Pins Agent 3 Pins
BREQ[0]# BR[0]# BR[3]# BR[2]# BR[1]#
BREQ[1]# BR[1]# BR[0]# BR[3]# BR[2]#
BREQ[2]# BR[2]# BR[1]# BR[0]# BR[3]#
BREQ[3]# BR[3]# BR[2]# BR[1]# BR[0]#
Table A-5. BR0# (I/O), BR1#, BR2#, BR3# Signals for 2P Rotating Interconnect
Bus Signal Agent 0 Pins Agent 3 Pins
BREQ[0]# BR[0]# BR[1]#
BREQ[1]# BR[1]# BR[0]#
BREQ[2]# Not Used Not Used
BREQ[3]# Not Used Not Used
Table A-6. BR[3:0]# Signals and Agent IDs
Pin Sampled
Asserted on
RESET#
Arbitration ID
Agent ID
Reported
BR[0]# 0 0
BR[3]# 1 2
BR[2]# 2 4
BR[1]# 3 6