Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

4-28 Vol. 1
DATA TYPES
See the following sections for information regarding the denormal-operand exception
when detected while executing x87 FPU or SSE/SSE2/SSE3 instructions:
• x87 FPU; Section 8.5.2, “Denormal Operand Exception (#D)”
• SIMD floating-point exceptions; Section 11.5.2.2, “Denormal-Operand Exception
(#D)”
4.9.1.3 Divide-By-Zero Exception (#Z)
The processor reports the floating-point divide-by-zero exception whenever an
instruction attempts to divide a finite non-zero operand by 0. The masked response
for the divide-by-zero exception is to set the ZE flag and return an infinity signed with
the exclusive OR of the sign of the operands. If the divide-by-zero exception is not
masked, the ZE flag is set, a software exception handler is invoked, and the operands
remain unaltered.
See the following sections for information regarding the divide-by-zero exception
when detected while executing x87 FPU or SSE/SSE2 instructions:
• x87 FPU; Section 8.5.3, “Divide-By-Zero Exception (#Z)”
• SIMD floating-point exceptions; Section 11.5.2.3, “Divide-By-Zero Exception
(#Z)”
4.9.1.4 Numeric Overflow Exception (#O)
The processor reports a floating-point numeric overflow exception whenever the
rounded result of an instruction exceeds the largest allowable finite value that will fit
into the destination operand. Table 4-9 shows the threshold range for numeric over-
flow for each of the floating-point formats; overflow occurs when a rounded result
falls at or outside this threshold range.