Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture
Vol. 1 5-17
INSTRUCTION SET SUMMARY
SSE instructions are divided into four subgroups (note that the first subgroup has
subordinate subgroups of its own):
• SIMD single-precision floating-point instructions that operate on the XMM
registers
• MXSCR state management instructions
• 64-bit SIMD integer instructions that operate on the MMX registers
• Cacheability control, prefetch, and instruction ordering instructions
The following sections provide an overview of these groups.
5.5.1 SSE SIMD Single-Precision Floating-Point Instructions
These instructions operate on packed and scalar single-precision floating-point
values located in XMM registers and/or memory. This subgroup is further divided into
the following subordinate subgroups: data transfer, packed arithmetic, comparison,
logical, shuffle and unpack, and conversion instructions.
5.5.1.1 SSE Data Transfer Instructions
SSE data transfer instructions move packed and scalar single-precision floating-point
operands between XMM registers and between XMM registers and memory.
MOVAPS Move four aligned packed single-precision floating-point values
between XMM registers or between and XMM register and
memory
MOVUPS Move four unaligned packed single-precision floating-point
values between XMM registers or between and XMM register and
memory
MOVHPS Move two packed single-precision floating-point values to an
from the high quadword of an XMM register and memory
MOVHLPS Move two packed single-precision floating-point values from the
high quadword of an XMM register to the low quadword of
another XMM register
MOVLPS Move two packed single-precision floating-point values to an
from the low quadword of an XMM register and memory
MOVLHPS Move two packed single-precision floating-point values from the
low quadword of an XMM register to the high quadword of
another XMM register
MOVMSKPS Extract sign mask from four packed single-precision floating-
point values
MOVSS Move scalar single-precision floating-point value between XMM
registers or between an XMM register and memory