Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 5-19
INSTRUCTION SET SUMMARY
5.5.1.4 SSE Logical Instructions
SSE logical instructions perform bitwise AND, AND NOT, OR, and XOR operations on
packed single-precision floating-point operands.
ANDPS Perform bitwise logical AND of packed single-precision floating-
point values
ANDNPS Perform bitwise logical AND NOT of packed single-precision
floating-point values
ORPS Perform bitwise logical OR of packed single-precision floating-
point values
XORPS Perform bitwise logical XOR of packed single-precision floating-
point values
5.5.1.5 SSE Shuffle and Unpack Instructions
SSE shuffle and unpack instructions shuffle or interleave single-precision floating-
point values in packed single-precision floating-point operands.
SHUFPS Shuffles values in packed single-precision floating-point
operands
UNPCKHPS Unpacks and interleaves the two high-order values from two
single-precision floating-point operands
UNPCKLPS Unpacks and interleaves the two low-order values from two
single-precision floating-point operands
5.5.1.6 SSE Conversion Instructions
SSE conversion instructions convert packed and individual doubleword integers into
packed and scalar single-precision floating-point values and vice versa.
CVTPI2PS Convert packed doubleword integers to packed single-precision
floating-point values
CVTSI2SS Convert doubleword integer to scalar single-precision floating-
point value
CVTPS2PI Convert packed single-precision floating-point values to packed
doubleword integers
CVTTPS2PI Convert with truncation packed single-precision floating-point
values to packed doubleword integers
CVTSS2SI Convert a scalar single-precision floating-point value to a
doubleword integer
CVTTSS2SI Convert with truncation a scalar single-precision floating-point
value to a scalar doubleword integer