Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 5-31
INSTRUCTION SET SUMMARY
LOCK (prefix) Lock Bus
HLT Halt processor
RSM Return from system management mode (SMM)
RDMSR Read model-specific register
WRMSR Write model-specific register
RDPMC Read performance monitoring counters
RDTSC Read time stamp counter
SYSENTER Fast System Call, transfers to a flat protected mode kernel at
CPL = 0
SYSEXIT Fast System Call, transfers to a flat protected mode kernel at
CPL = 3
5.10 64-BIT MODE INSTRUCTIONS
The following instructions are introduced in 64-bit mode. This mode is a sub-mode of
IA-32e mode.
CDQE Convert doubleword to quadword
CMPSQ Compare string operands
CMPXCHG16B Compare RDX:RAX with m128
LODSQ Load qword at address (R)SI into RAX
MOVSQ Move qword from address (R)SI to (R)DI
MOVZX (64-bits) Move doubleword to quadword, zero-extension
STOSQ Store RAX at address RDI
SWAPGS Exchanges current GS base register value with value in MSR
address C0000102H
SYSCALL Fast call to privilege level 0 system procedures
SYSRET Return from fast system call
5.11 VIRTUAL-MACHINE EXTENSIONS
The behavior of the VMCS-maintenance instructions is summarized below:
VMPTRLD Takes a single 64-bit source operand in memory. It makes the
referenced VMCS active and current.
VMPTRST Takes a single 64-bit destination operand that is in memory.
Current-VMCS pointer is stored into the destination operand.
VMCLEAR Takes a single 64-bit operand in memory. The instruction sets
the launch state of the VMCS referenced by the operand to
“clear”, renders that VMCS inactive, and ensures that data for