Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

6-16 Vol. 1
PROCEDURE CALLS, INTERRUPTS, AND EXCEPTIONS
If a stack switch does occur, the processor does the following:
1. Temporarily saves (internally) the current contents of the SS, ESP, EFLAGS, CS,
and EIP registers.
2. Loads the segment selector and stack pointer for the new stack (that is, the stack
for the privilege level being called) from the TSS into the SS and ESP registers
and switches to the new stack.
3. Pushes the temporarily saved SS, ESP, EFLAGS, CS, and EIP values for the
interrupted procedure’s stack onto the new stack.
4. Pushes an error code on the new stack (if appropriate).
5. Loads the segment selector for the new code segment and the new instruction
pointer (from the interrupt gate or trap gate) into the CS and EIP registers,
respectively.
6. If the call is through an interrupt gate, clears the IF flag in the EFLAGS register.
7. Begins execution of the handler procedure at the new privilege level.
Figure 6-5. Stack Usage on Transfers to Interrupt and Exception Handling Routines
CS
Error Code
EFLAGS
CS
EIP
ESP After
Transfer to Handler
Error Code
ESP Before
Transfer to Handler
EFLAGS
EIP
SS
ESP
Stack Usage with No
Privilege-Level Change
Stack Usage with
Privilege-Level Change
Interrupted Procedure’s
Interrupted Procedure’s
and Handler’s Stack
Handler’s Stack
ESP After
Transfer to Handler
Transfer to Handler
ESP Before
Stack