Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

Vol. 1 6-17
PROCEDURE CALLS, INTERRUPTS, AND EXCEPTIONS
A return from an interrupt or exception handler is initiated with the IRET instruction.
The IRET instruction is similar to the far RET instruction, except that it also restores
the contents of the EFLAGS register for the interrupted procedure. When executing a
return from an interrupt or exception handler from the same privilege level as the
interrupted procedure, the processor performs these actions:
1. Restores the CS and EIP registers to their values prior to the interrupt or
exception.
2. Restores the EFLAGS register.
3. Increments the stack pointer appropriately.
4. Resumes execution of the interrupted procedure.
When executing a return from an interrupt or exception handler from a different priv-
ilege level than the interrupted procedure, the processor performs these actions:
1. Performs a privilege check.
2. Restores the CS and EIP registers to their values prior to the interrupt or
exception.
3. Restores the EFLAGS register.
4. Restores the SS and ESP registers to their values prior to the interrupt or
exception, resulting in a stack switch back to the stack of the interrupted
procedure.
5. Resumes execution of the interrupted procedure.
6.4.2 Calls to Interrupt or Exception Handler Tasks
Interrupt and exception handler routines can also be executed in a separate task.
Here, an interrupt or exception causes a task switch to a handler task. The handler
task is given its own address space and (optionally) can execute at a higher protec-
tion level than application programs or tasks.
The switch to the handler task is accomplished with an implicit task call that refer-
ences a task gate descriptor. The task gate provides access to the address space
for the handler task. As part of the task switch, the processor saves complete state
information for the interrupted program or task. Upon returning from the handler
task, the state of the interrupted program or task is restored and execution
continues. See Chapter 5, “Interrupt and Exception Handling,” in the Intel® 64 and
IA-32 Architectures Software Developer’s Manual, Volume 3B, for more information
on handling interrupts and exceptions through handler tasks.
6.4.3 Interrupt and Exception Handling in Real-Address Mode
When operating in real-address mode, the processor responds to an interrupt or
exception with an implicit far call to an interrupt or exception handler. The processor
uses the interrupt or exception vector number as an index into an interrupt table. The