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Intel 64 and IA-32 Architectures Software Developers Manual Volume 1, Basic Architecture

ManualsBrandsIntel ManualsOtherIntel Pentium 4 Processor 2.80 GHz, 512K Cache, 533 MHz FSB
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Vol. 1 6-25
PROCEDURE CALLS, INTERRUPTS, AND EXCEPTIONS
Figure 6-10. Stack Frame After Entering Procedure C
EBP
Display
Old EBP
ESP
Main’s EBP
Dynamic
Storage
Procedure A’s EBP
Main’s EBP
Main’s EBP
Procedure A’s EBP
Procedure B’s EBP
Main’s EBP
Procedure A’s EBP
Procedure B’s EBP
Procedure C’s EBP
Main’s EBP
Procedure A’s EBP